Electrically alterable, nonvolatile floating gate memory device

Details Electrically alterable, nonvolatile floating gate memory device Electrically alterable, nonvolatile floating gate memory device

1984-07-23

1986-10-21

James, Andrew J.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 235, 365185, H01L 2934

Patent

active

046188762

ABSTRACT:
A floating gate structure wherein the floating gate is a second level polysilicon layer that is substantially shielded from the substrate by a segmented, discontinuous first level word line. Coupling of the floating gate to the substrate for "writing" is accomplished by extending the floating gate between word line segments while electrical continuity of the word line is maintained by buried contacts which make electrical contact to a continuous third level polysilicon layer.

REFERENCES:
patent: 3500142 (1970-03-01), Kahng
patent: 3660819 (1972-05-01), Frohman-Bentchkowsky
patent: 4328565 (1982-05-01), Harari
patent: 4513397 (1985-04-01), Ipri
patent: 4558339 (1985-12-01), Angle
"16-K EE-PROM Relies on Tunneling for Byte-Erasable Program Storage", W. S. Johnson, et al., Electronics, Feb. 28, 1980, pp. 113-117.
IBM Technical Disclosure Bulletin, vol. 24, #7A, p. 3311, Dec. 1981 by Alberts.

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