Electrically alterable non-volatile memory

Details Electrically alterable non-volatile memory Electrically alterable non-volatile memory

1982-08-17

1986-03-11

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Semiconductive

365205, 365218, 365189, G11C 700, G11C 1140

Patent

active

045758239

ABSTRACT:
A non-volatile memory and method is described incorporating an array of variable threshold transistors, a row decoder, a buffer circuit positioned between the array and row decode circuitry, column decode circuitry, and a sense amplifier. The non-volatile memory overcomes the problem of high voltages in the memory array during READ operation. During READ operation the variable threshold transistors operate in the common source mode. A buffer circuit with level shift capability is described incorporating P and N channel transistors. A sense amplifier with decoupling during sensing or lock out is described incorporating P and N channel transistors.

REFERENCES:
patent: 3702466 (1972-11-01), Nakagiri et al.
patent: 3702990 (1972-11-01), Ross
patent: 3760378 (1973-09-01), Burns
patent: 4090258 (1978-05-01), Cricchi
patent: 4149270 (1979-04-01), Cricchi
patent: 4170741 (1979-10-01), Williams
patent: 4193128 (1980-03-01), Brewer

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