Electrical parallel processing frequency coded logic

Details Electrical parallel processing frequency coded logic Electrical parallel processing frequency coded logic

2005-01-11

2005-01-11

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

C326S099000

Reexamination Certificate

active

06842047

ABSTRACT:
A method and apparatus for electrical parallel processing logic operations in which one and zero are represented by presence and absence, respectively, of a sinusoidal wavetrain. Different frequency information channels can be handled simultaneously and independently. The form of data representation is strictly preserved from gate input to output thereby ensuring compatibility with conventional memory, counter, register, and other digital logic design. Input impedance is high and output impedance is minuscule, conducive to high fan out. Because arbitrarily sophisticated circuits, including full scale computers, may be essentially entirely built out of Boolean logic gate combinations, the proposed parallel processing logic enables parallel processing in computers without recourse to timesharing, redundant multiprocessor architecture, or still speculative “quantum computer” hardware.

REFERENCES:
patent: 4564774 (1986-01-01), Tashiro et al.
patent: 4638188 (1987-01-01), Cray
patent: 4706299 (1987-11-01), Jorgensen
patent: 6151428 (2000-11-01), Vahala et al.

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