Electrical-interference-isolated transistor structure

Details Electrical-interference-isolated transistor structure Electrical-interference-isolated transistor structure

2007-03-06

2007-03-06

Potter, Roy Karl (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

C257S676000

Reexamination Certificate

active

11051677

ABSTRACT:
A transistor structure includes at least one chip; a packaging insulating layer, a first adhesive layer, a conducting layer, and a second adhesive layer sequentially provided on one side of the chip having electrical contacts thereon, so that the conducting layer is bonded between the first and the second adhesive layer; and a leadframe bonded to an outer side of the second adhesive layer. The conducting layer may be a metal sheet, a metal film, or a type of conducting fiber. The leadframe is connected to the electrical contacts on the chip via lead wires, and at least one of the electrical contacts on the chip is connected to the conducting layer via a conductor, so that the conducting layer is able to isolate electrical noises and reduce electromagnetic interferences, improve rates of transmission and heat release, strengthen chip packaging structure, and serve as a common grounding circuit.

REFERENCES:
patent: 5233220 (1993-08-01), Lamson et al.
patent: 5386141 (1995-01-01), Liang et al.
patent: 7061085 (2006-06-01), Moxham

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