Electrical erasable and programmable read-only memory and manufa

Details Electrical erasable and programmable read-only memory and manufa Electrical erasable and programmable read-only memory and manufa

1988-09-08

1993-10-12

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257914, H01L 2968, H01L 2978

Patent

active

052528472

ABSTRACT:
A method for manufacturing an EEPROM comprises the step of using raw gas containing an organic compound having a molecular weight of more than 44, such as ethyl acetate and tetrahydrofuran when a first polysilicon layer serving as a select gate electrode and a second polysilicon layer serving as a floating gate electrode are deposited by a CVD process. The above described step allows a voltage at the time of tunneling electrons to be decreased.

REFERENCES:
patent: 4099196 (1978-07-01), Simko
patent: 4302766 (1981-11-01), Guterman
patent: 4554180 (1985-11-01), Hirooka
patent: 4766477 (1988-08-01), Nakagawa et al.
"Organic Chemistry"; 4th ed., Morrison et al. .COPYRGT.1983 p. 30.
"Characterization of Thermally Oxidized n.sup.+ Polycrystalline Silicon", IEEE Trans. vol. Ed-32 No. 3 3-85 pp. 577-583.
J. of Appl. Phys.: "Evidence for Surface Asperity Mechanism of Conductivity in Oxide Grown on Polycrystalline Silicon" by R. M. Anderson et al, vol. 48, No. 11, Nov. 1977 pp. 4834-4836.

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