Electrical connection pattern in an electronic panel

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S611000

Reexamination Certificate

active

07432213

ABSTRACT:
A connector layout for arranging a plurality of parallel electrical connectors between two electronic devices. Each connector has a strip connected to a bump pad. Each strip has a certain required strip width and each bump pad has a certain required pad width. Each bump pad on one electronic device is electrically connected to a corresponding bump pad on the other device by superimposition. The connectors are grouped into a group of three or more. Within each group, a strip is connected to a bump pad along one side edge thereof, and the bump pads are offset in two directions such that after the bump pads are superimposed, the pattern of the connected connectors in each group of connectors resembles a plurality of zigzag paths offset to maintain a constant gap between two strips. As such, the gap between two connectors can be minimized.

REFERENCES:
patent: 03-097238 (1991-04-01), None
patent: 05-062978 (1993-03-01), None
patent: 2000-137239 (2000-05-01), None
patent: 2003-057677 (2003-02-01), None

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