Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1993-03-19
1994-11-01
Westin, Edward P.
Electronic digital logic circuitry
Interface
Logic level shifting
326 21, 326122, 327513, 327543, H03K 190175, H03K 190948
Patent
active
053610067
ABSTRACT:
Electrical circuitry of CMOS inverter circuits in cascade providing a compatible interface between ECL logic levels and CMOS logic levels. The ECL input is applied to the gate of the N-type transistor of the first inverter circuit. A threshold control circuit includes a CMOS inverter circuit with the gate of the N-type transistor connected to a reference voltage and the gate of the P-type transistor connected to its drain is connected to the gate of the P-type transistor of the first inverter circuit. The threshold control circuit adjusts the threshold voltage of the first inverter circuit so as to compensate for changes in current flow through the N-type or P-type transistors, thereby permitting operation over extreme variations in circuit parameters under situations of poor operating tolerances and wide temperature variations.
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patent: 5229659 (1993-07-01), Sandhu
Cooperman Michael
Sieber Richard
GTE Laboratories Incorporated
Lohmann, III Victor F.
Santamauro Jon
Westin Edward P.
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