Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1998-01-23
2001-05-22
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S013000, C703S014000
Reexamination Certificate
active
06237126
ABSTRACT:
TECHNICAL FIELD
The invention concerns a method for an analysis of the electrical behavior of monolithically integrated circuits which can be utilized for the improvement of the electromagnetic emission behavior of integrated circuits.
The invention also relates to using computer programs or other automation method to analyze the electrical behavior or the electromagnetic emission behavior or to automatically optimize the same of integrated circuits.
BACKGROUND OF THE INVENTION
Modem monolithically integrated semiconductor circuits with very high degree of integration mostly are so complex that computer programs are used both for the design thereof and for the analysis of their electrical behavior and in part also for their optimization. For example, there are computer programs by means of which electrical circuit diagrams or functional block circuit diagrams can be transferred to layout information by means of which layouts for integrated semiconductor circuits can be formed. On the other hand, there are computer programs by means of which simulation computer models can be prepared from circuit diagrams or layouts of integrated circuits, by means of which the behavior and/or the reaction of the circuits or circuit parts simulated by a computer model can be ascertained or tested.
For example, by means of a computer program named AMPS (Automatic Minimization Of Power through Sizing), it is possible to optimize digital CMOS circuits with regard to power, working speed and space requirement on a semiconductor chip. This program is capable of automatically resizing transistors, i.e., to make them larger and/or smaller so as to find a combination that will best meet user-defined goals concerning power, speed and chip area requirements without changing the functionality of the design of an integrated circuit. This computer program is suitable on the one hand for designing cells of integrated circuits and can be used upon termination of the design of the integrated circuit on the other hand for the verification whether the desired goals have actually been met or whether further improvements are necessary.
A problem with increasing significance in case of integrated semiconductor circuits consists in that interferences with other integrated semiconductor circuits can occur in certain applications by electromagnetic emission of high-frequency interference radiation via supply and functional terminal pins of a semiconductor component or that the semiconductor component concerned is subject to radiation sensitivity with regard to such high-frequency interference radiation. Efforts are thus made to check and optimize the quality of an integrated circuit with respect to emission behavior and/or the radiation sensitivity concerning high-frequency electromagnetic emission already during circuit development.
The publication “Analog System Engineering” by Michael Gutzmannn, pages 8 and 9, describes in the section “Simultaneous switching noise of CMOS Systems” a method of making a simulation model and of performing a simulation in which, for example, a circuit simulation program SPICE can be used. By preparing an R, L, C, G matrix, electrical parameters either of an entire integrated circuit or only of one cell thereof are extracted first, an electrical network of the package with terminal legs and connecting leads as well as a model of I/O circuits (INPUT/OUTPUT circuits) are made, and on the basis of the same a circuit simulation is performed for example by means of the program SPICE. The circuit simulation delivers so-called transient waveforms in the form of a record of the current patterns in terms of time at all circuits nodes of interest of the integrated circuit or cell, respectively.
When this known method is used for modeling and simulating the complete integrated circuit, one can make only a relatively coarse model. For, highly integrated circuits of the type used nowadays are so complex that, if good simulation results for the entire integrated circuit are to be achieved, which necessitates a relatively fine simulation model and sufficiently high resolution by using a correspondingly high scanning rate of the signal patterns obtained by simulation, one would arrive at computing times which, even with the use of fast computers, would by far be too long for practical application. Computing times of about 2 to 3 months would have to be expected.
For obtaining computing times that still are acceptable for practical application, a highly simplified or coarse simulation model and/or a very poor resolution by slow scanning rates would have to be used. Both reduces the required computing time, but often leads to only quite inaccurate results that frequently are not acceptable.
Another possibility consists in preparing a simulation model not of the entire integrated circuit, but only of a cell, i.e., of an extracted functional block, of the integrated circuit. One may indeed arrive thereby at more acceptable computing times by finer simulation models and with higher resolution by use of higher scanning rates. However, the simulation result again is too inaccurate since an entire environment of the simulated cell, namely the remainder of the integrated circuit, package parameters, I/O structures, lead structures, supply voltage structures, etc. are completely left out of consideration, although they may have considerable influence on the function of the simulated cell of the integrated circuit.
SUMMARY OF THE INVENTION
Such problems are to be overcome with the present invention. In particular, simulations are to be rendered possible with acceptable computing times for practical application, which permit a sufficiently qualified statement on the functional behavior, in particular in connection with electromagnetic interference emission, of cells of interest of integrated circuits.
An embodiment of the invention consists in using for the simulation a mixed model which is composed of a fine model part as regards the cell of interest and of a coarse model part as regards the remainder of the integrated circuit, with a possibility of adding to the coarse model part preferably also a lead model and/or a voltage supply model and/or an input/output structure model and/or a package structure model and/or a load model. For preparing the coarse model part, only passive components in the form of complex resistors are taken into consideration, whereas active components, passive components and parasitic components are taken into consideration for making the fine model part.
A resulting fine-coarse computer model on the one hand displays sufficiently low complexity in order to be thus able to perform a simulation with high resolution accuracy and still sufficiently short computing time for practical application, and on the other hand by way of the coarse model part takes into sufficient consideration the electrical environment of the cell having an effect on the electrical behavior of this cell.
For preparing the fine-coarse computer model and for the simulation, known computer programs can be used, for example a program DRACULA for the extraction and the since long proven program SPICE for the simulation.
Conventional simulation methods usually employ digital stimulation signals in the form of stimulation pulses with sloping pulse edges. Such stimulation signals, however, are frequently so remote from the form of actually occurring signals that they are contrary to the achievement of good simulation results.
In a particularly preferred embodiment of the method according to the invention, a fine simulation proper is preceded by a step making available more realistic stimulation signals by means of the fine-coarse computer model, by producing at first a coarse simulation computer model of the entire integrated circuit that takes into account only the active components thereof, and by then performing a coarse simulation with the aid of said coarse simulation computer model by presetting predetermined operational parameters and applying test signals of predetermined signal shape to input terminals of the coar
Carlson David V.
Galanthay Theodore E.
Seed IP Law Group PLLC
Smith Matthew
STMicroelectronics GmbH
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