Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2000-03-23
2001-08-28
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S112000, C327S323000, C327S374000, C326S021000, C326S027000, C326S083000
Reexamination Certificate
active
06281720
ABSTRACT:
TECHNICAL FIELD
The invention relates to an electric integrated circuit comprising a CMOS output driver stage which is controllable by means of switching control pulses of control signal sources.
BACKGROUND OF THE INVENTION
In many applications care must be taken that a circuit with a CMOS output driver displays neither too strong emission of electromagnetic interference radiation nor too much sensitivity with respect to incoming electromagnetic interference radiation.
SUMMARY OF THE INVENTION
With the disclosed embodiments of the present invention an integrated circuit with CMOS output driver stage is made available that achieves considerable improvement in the electromagnetic compatibility (EMC) behavior.
An integrated circuit according to the embodiments of the invention provides a switching-on voltage reducing stage in the integrated circuit that results in switching of the output driver stage with soft edges and correspondingly low electromagnetic interference radiation. This is achieved by superimposition of the forward behavior of MOS transistors connected in parallel, of which one, in the on-state, acts virtually like an ohmic resistor and the other one is of low on-state forward resistance, while however due to the fact that its gate is connected to the gate terminal of the respective other driver transistor, it reaches the conducting state with a delay that is dependent on the change in gate potential of this particular other driver transistor during switching operations. In this manner, soft edge transitions are obtained without the necessity of additional external (outside the IC) filter circuits.
The softness of the switching edges of the driver transistors can be enhanced further by arranging several low-impedance transistors in series connection and connecting the high-impedance parallel transistor in parallel with this entire series connection.
The degree of edge softness can also be made programmable in that at least one of the low-impedance transistors has a bridging switching transistor connected in parallel thereto by means of which the bridged transistor can be switched into the effective or ineffective state. Another configuration with respect to the programmability of the edge softness consists in rendering at least one of the low-impedance transistors programmable either in a diode circuit or in designing it to be permanently conductive.
Electromagnetic interference is also generated in that between the supply voltage terminals of the integrated circuit, there are flowing pulse-shaped cross-currents during switching operations. This is prevented with a preferred embodiment of the circuit according to the invention in that an inverter stage and a cross-current avoiding stage following the same are connected between the control signal source and the switching-on voltage reducing circuit. The inverter stage includes two CMOS inverter stages connected in parallel, and in each inverter stage one of the two CMOS transistors is designed as fast switching transistor and the other one of the two CMOS transistors is designed as slow switching transistor, with the high-potential side P-channel transistor of the one inverter and the low-potential side N-channel transistor of the other inverter being designed as a fast switching transistor and the respective other one as slow a switching transistor. The cross-current avoiding stage comprises a series connection connected between the two supply voltage terminals and including a high-potential side MOS transistor of a first channel type, a low-potential side MOS transistor of the opposite channel type and therebetween a parallel connection including two MOS transistors of different channel type. The high-potential side MOS transistor and the MOS transistor of the parallel connection of opposite channel type are controlled by the output of the one inverter, while the low-potential side MOS transistor and the other MOS transistor of the parallel connection are controlled by the output of the second inverter. The dimensioning of the inverters, which is asymmetrical with respect to the switching speeds, has the effect that during switching control of the output driver stage, there is never created a conducting path between the two supply voltage terminals over the cross-current avoiding stage, but rather, feeding of the high supply voltage potential and the low supply voltage potential, respectively, to the gate of the low-potential side driver transistor and the high-potential side driver transistor, respectively, always takes place only via the low-potential side MOS transistor and one of the two MOS transistors of the parallel connection and via the high-potential side MOS transistor and the other one of the two parallel MOS transistors, respectively, there being always at least one transistor of the high-potential side and low-potential side transistor pair on the one hand and of the two parallel-connected transistors on the other hand in the blocking state.
The dimensioning of the inverter transistors as fast or slow switching MOS transistors is effected via the dimensioning of their ratio of channel width to channel length.
An additional measure for avoiding cross-currents through the two driver transistors consists in a switch stage inserted between the switching-on voltage reducing circuit and the output driver stage. This switch stage includes two switching transistors which are each connected between the gate of one of the two driver transistors and the high-potential side and low-potential side supply voltage terminal, respectively, and which are controlled by one of the two inverters each. Due to the asymmetrical dimensioning of the two inverters, switching over of the driver stage has the effect that switching off of the respective driver transistor to be switched off takes place rapidly and switching on of the respective other driver transistor to be switched on takes place slowly, so that cross-currents across the series connection of the two driver transistors are thus avoided.
In an embodiment of the invention, the edge steepness of the output signal of the output driver stage is reduced in addition with the aid of a feedback stage for each of the two driver transistors. Each of the two feedback stages comprises a Miller feedback circuit which effects a reduction in edge steepness under the influence of the Miller capacitance. Programmability preferably exists in so far as the feedback stages are switchable in feedback-effective and feedback-ineffective manner, so that different signal edge steepnesses can be set at the output of the output driver stage.
To make electromagnetic interferences innocuous that enter via the supply voltage lines, an embodiment of the invention comprises a filter stage between the control signal source and the switching-on voltage reducing stage. This filter stage is preferably composed with series inductances and series resistors and shunt capacitances.
The integrated circuit according to the embodiments of the invention can be conceived both as output circuit and as input circuit, with an output/input terminal of the integrated circuit issuing either output driver pulses of the output driver stage as output signals or with input signals being input via this terminal which are passed from the terminal to an input of a Schmitt trigger and to the input of an analog switch. In a preferred embodiment the Schmitt trigger has two independently adjustable threshold values. The Schmitt trigger can thus be matched as to whether the signal incoming a the terminal contains high noise and high interference peaks or low noise and low interference peaks. In case of operation of the overall circuit as an output stage, the Schmitt trigger should be provided with an additional input (enable) to avoid cross-currents in the Schmitt trigger (during level change at inout).
The analog switch can be designed in accordance with DE 37 17 922 C2. Such an analog switch has two shunt branches with a series connection of two P-channel MOS transistors in the one shunt branch and a series connection of two
Cunningham Terry D.
Galanthay Theodore E.
Nguyen Long
Seed IP Law Group PLLC
STMicroelectronics GmbH
LandOfFree
Electric integrated circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electric integrated circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electric integrated circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2515655