eFuse sense circuit

Static information storage and retrieval – Read/write circuit – Having fuse element

Reexamination Certificate

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C365S207000

Reexamination Certificate

active

11297311

ABSTRACT:
An eFuse reference cell on a chip provides a reference voltage that is greater than a maximum voltage produced by an eFuse cell having an unblown eFuse on the chip but less than a minimum voltage produced by an eFuse cell having a blown eFuse on the chip. A reference current flows through a resistor and an unblown eFuse in the eFuse reference cell, producing the reference voltage. The reference voltage is used to create a mirrored copy of the reference current in the eFuse cell. The mirrored copy of the reference current flows through an eFuse in the eFuse cell. A comparator receives the reference voltage and the voltage produced by the eFuse cell. The comparator produces an output logic level responsive to the voltage produced by the eFuse cell compared to the reference voltage.

REFERENCES:
patent: 5384727 (1995-01-01), Moyal et al.
patent: 6368902 (2002-04-01), Kothandaraman et al.
patent: 6624499 (2003-09-01), Kothandaraman et al.
patent: 6995601 (2006-02-01), Huang et al.
Kyunam Lim, et al., “Bit Line Coupling Scheme and Electrical Fuse Circuit for Reliable Operation of High Density DRAM”, Dig. Symp. VLSI Circuits, pp. 33-34, Jun. 2001.
Bruce Cowan, et al., “On-Chip Repair and an ATE Independent Fusing Methodology”, ITC International Test Conference Proceedings, pp. 178-186, Oct. 2002.
Mohsen Alavi, et al., “A PROM Element Based on Salicide Agglormeration of Poly Fuses in a CMOS Logic Process”, IEDM Tech. Dig., pp. 855-858, Dec. 1997.
C. Kothandaraman, et al., “Electrically Programmable Fuse (eFUSE) Using Electromigration in Silicides”, IEEE Electron Device Lett., vol. 23, No. 9, pp. 523-525.

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