Efficient technique for implementing broadcasts on a system of h

Details Efficient technique for implementing broadcasts on a system of h Efficient technique for implementing broadcasts on a system of h

1996-07-02

1998-09-08

Sheikh, Ayaz R.

395300, 3952003, 39520068, 39520069, G06F 1300

Patent

active

058058397

ABSTRACT:
An architecture for a multiprocessor computer system is provided. The multiprocessor computer system includes multiple repeater nodes. Each repeater node includes a transaction repeater and at least one bus device coupled to the repeater on a lower level bus. The repeater nodes are connected by an upper level bus. Each bus device includes an incoming queue. Transaction originating in a particular repeater node are stored in the incoming queue, whereas transactions originating in other repeater nodes bypass the incoming queue to the bus device. A control signal is asserted by the repeater so that a transaction is received by bus devices in the originating node from the incoming queues at the same time and in the same order it is received by bus devices in non-originating nodes. Thus a hierarchical bus structure is provided that overcomes physical/electrical limitations of single bus architecture while maximizing bus bandwidth utilization.

REFERENCES:
patent: 4412285 (1983-10-01), Neches et al.
patent: 4622631 (1986-11-01), Frank et al.
patent: 4819232 (1989-04-01), Krings
patent: 5029070 (1991-07-01), McCarthy et al.
patent: 5072369 (1991-12-01), Theus et al.
patent: 5522058 (1996-05-01), Iwasa et al.
patent: 5530933 (1996-06-01), Frink et al.
patent: 5533103 (1996-07-01), Peavy et al.
patent: 5537574 (1996-07-01), Elko et al.
patent: 5557758 (1996-09-01), Bland et al.
patent: 5579512 (1996-11-01), Goodrum et al.
patent: 5584004 (1996-12-01), Aimoto et al.
patent: 5588131 (1996-12-01), Borrill
patent: 5590335 (1996-12-01), Dubourreau et al.
patent: 5608893 (1997-03-01), Slingwine et al.
patent: 5627766 (1997-05-01), Beaven
patent: 5655103 (1997-08-01), Cheng et al.
patent: 5664147 (1997-09-01), Mayfield
patent: 5664193 (1997-09-01), Tirumalai
Hagersten et al., "Simple COMA Node Implementations," Ashley Saulsbury and Anders Landin Swedish Institute of Computer Science, 1995, 12 pages.
Saulsbury et al., "An Argument for Simple COMA," Swedish Institute of Computer Science, 1995, 10 pages.
D. Lenosky, PhD, "The Description and Analysis of DASH: A Scalable Directory-Based Multiprocessors," DASH Prototype System, Dec. 1991, pp. 36-56.
Hagersten et al., "Simple COMA," Ashley Saulsbury and Anders Landin Swedish Institute of Computer Science, Jul. 1993, pp. 233-259.
Cox et al., "Adaptive Cache Coherency for Detecting Migratory Shared Data," Proc. 20.sup.th Annual Symposium on Computer Architecture, May 1993, pp. 98-108.
Stenstrom et al., "An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing," Proc. 20.sup.th Annual Symposium on Computer Architecture, May 1993 IEEE, pp. 109-118.
Wolf-Dietrich Weber et al., "Analysis of Cache Invalidation Patterns in Multiprocessors", Computer Systems Laboratory, Stanford University, CA, pp. 243-256.
Kourosh et al., "Two Techniques to Enhance the Performance of Memory Consistency Models," 1991 International Conference on Parallel Processing, pp. 1-10.
Li et al., "Memory Coherence in Shared Virtual Memory Systems," 1986 ACM, pp. 229-239.

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