Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2005-05-03
2005-05-03
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S019000, C710S263000
Reexamination Certificate
active
06889270
ABSTRACT:
A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.
REFERENCES:
patent: 5708814 (1998-01-01), Short et al.
patent: 5966547 (1999-10-01), Hagan et al.
patent: 6269412 (2001-07-01), Liu et al.
patent: 20030034797 (2003-02-01), Bentz
Burrow Stephen R.
Gregg Thomas A.
Pandey Kulwant M.
Sugrue Patrick J.
Augspurger Lynn L.
Huynh Kim
International Business Machines - Corporation
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