Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2005-02-11
2008-10-14
Chaudry, Mujtaba K (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
C714S733000, C714S734000
Reexamination Certificate
active
07437626
ABSTRACT:
Memory array built in self testing utilizing including a simple data history table. The table is used to track failing locations observed during any level of assembly test of processor or logic semiconductor chips where the chips contain SRAM macros with redundant elements for failure relief.
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Chang Tom Y.
Huott William V.
Knips Thomas J.
Plass Donald W.
Augspurger Lynn L.
Chaudry Mujtaba K
International Business Machines - Corporation
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