Efficient method for modeling three-dimensional interconnect...

Details Efficient method for modeling three-dimensional interconnect... Efficient method for modeling three-dimensional interconnect...

1999-02-11

2002-07-09

Teska, Kevin J. (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Emulation

Compatibility emulation

C703S013000, C703S019000, C716S030000, C716S030000

Reexamination Certificate

active

06418401

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to a method and system for computing the database of R(f), L(f), and C matrices for lossy interconnects that are used as the basis for CAD tools evaluating wiring delay and crosstalk in various electronic circuits and systems.
2. Description of Prior Art
It has been shown in A. Deutsch, H. Smith, C. W. Surovic, G. V. Kopcsay, D. A. Webber, G. A. Katopis, W. D. Becker, P. W. Coteus, A. H. Dansky, G. A. Sai-Halasz, “Frequency-dependent Crosstalk Modeling for On-chip Interconnections”, Proceedings IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging, February, 1998, West Point, N.Y., pp. 35-38 that crosstalk evaluation on medium and long on-chip interconnections requires frequency-dependent R(f)L(f)C circuit representation. The traditional, lumped-circuit RC circuit underestimates crosstalk noise. A constant parameter RLC circuit will either under or over predict noise depending on line length and driver circuit size.
Typical examples of crosstalk noise predictions are shown in
FIG. 1
, where far-end (FEN)
3
and near-end (NEN)
4
crosstalk simulated with either FEN
1
or NEN
2
circuit topologies and using either distributed RC
5
, RLC
6
,
8
, or R(f)L(f)C
7
,
9
circuit representation are shown for 5-mm-long lines on layer M
5
.
Another example of crosstalk noise predictions is shown in
FIG. 2
, where simulated FEN
13
,
14
and NEN
15
,
16
crosstalk for Z
DRV
=Z
0
and Z
DRV=
3Z
0
, are shown as a function of length for lines in layer M
5
. Both
FIGS. 1 and 2
compare distributed RC, RLC, and R(f)L(f)C simulations.
The error in prediction can be in the range of 25-80% as tabulated in
FIG. 3
, which shows the results for both, FEN
31
and NEN
32
circuit topologies. In a FEN case
31
, the noise is monitored at the far-end of the quiet line Q
33
, which is farthest from the driving end on the active line A
34
. The active and quiet lines have the drivers at the same near end. In the NEN case
32
, the driver on
25
the quiet line
35
is at the far-end and the noise is monitored at the near end.
As shown in
FIG. 4
b
, the error in the crosstalk prediction is caused by “proximity effect” around the signal conductors. Due to the sparse V
DD
and GND conductors available on chip, at high-frequency, current crowds around the conductors and the effective ground resistance R
12
42
increases significantly.
The skin-effect, as seen from
FIG. 4
a
, where R
10
41
is shown to have very small rise with frequency, is not significant. The skin depth is
&dgr;=1.0-1.5 &mgr;m at +25° C.
and
0.4-0.6 &mgr;m at −160° C.
As described in A. Deutsch, G. V. Kopcsay, V. A. Ranieri, J. K. Catald, E. A. Galligan, W. S. Graham, R. P. McGouey, S. L. Nunes, J. R. Paraszczak, J. J. Ritsko, R. J. Serino, D. Y. Shih, J. S. Wilszynski, “High-speed propagation on lossy transmission lines”, IBM Journal research and Develop., vol. 34, No. 4, pp.601-615, July 1990, the skin-effect would be fully developed if
&dgr;≦0.1
t,
where t is the conductor thickness.
In the example shown in
FIGS. 4
a
,
4
b
, t=2.1 &mgr;m. Due to the strong variation of R
12
42
with frequency, the resultant current redistribution in the ground lines causes L
12
44
to also show substantial variation. The L
10
43
term, however, has very little decrease and thus the inductive coupling,
K
L
=L
12
/L
11
, where
L
11
=L
10
+L
12
will decrease with frequency. In the example shown, K
L
decreases from 0.65 to 0.41 for f=0.001 and f=10 GHz. K
L
is not constant as assumed in an RLC-circuit representation or zero as assumed in an RC case.
The signals propagated on long, critical interconnects, such as data buses between the CPU and the cache, have rise times of
t
r
=50-100 ps.
If these interconnects are viewed as low-pass filters having an “upper-3dB” frequency of
f
c
=½Π
RC,
as explained in J. Millman, H. Taub, “Pulse, Digital, and Switching Waveforms”, Chapter 2, pp.27-50, McGraw-Hill Book Co., NY, 1965, then
t
r
=0.35
/f
c
, and
f
c
=3.5-7.0
GHz.
The upper frequency range of interest is then 3.5-7 GHz, which is where most of the increase in R
12
and decrease of L
12
is shown. The slight increase in R
10
and decrease of L
10
will cause attenuation of the noise and variation in the series impedance of the line
Z
(&ohgr;)=
R+j&ohgr;L
, where &ohgr;=2Π
f.
The variation in impedance affects the amplitude of the noise which travels in both directions on the quiet line, is reflected from the end devices, i.e., driver or receiver, and depends on the mismatch between Z
DRV
and Z(&ohgr;).
All these affects are not captured by RC or RLC circuit and hence contribute to the errors shown in FIG.
3
. In
FIG. 4
a
, &ohgr;L
45
is shown to exceed R
10
41
for f>0.8 GHz and therefore inductance has to be taken into account. This is why the RC circuit is in so much error. The RLC circuit assumes a constant K
L
and no attenuation. Only the R(f)L(f)C circuit is able to capture all the effects.
The R(f), L(f), and C matrices are used to synthesize a resection distributed circuit which represents the calculated frequency-dependent behavior of the series impedance Z(&ohgr;) and shunt admittance Y(&ohgr;)=j&ohgr;C.
FIGS. 5
a
,
5
b
show examples of calculated parameters R
11
=R
10
+R
12
and R
12
obtained from accurate three-dimensional calculations and predicted by the synthesized circuit. Very good agreement can be obtained. Such a distributed circuit using the subsection
53
shown in
FIG. 5
c
is used in simulations to predict the crosstalk noise.
A technique for implementing this synthesis approach in a very efficient manner in a CAD tool is described in B. J. Rubin, S. Daijavad, “Calculation of Mullti-Port Parameters of Electronic Packages Using a General Purpose Electromagnetic Code”, Proceedings of the 2nd IEEE Topical Meeting on Electrical Performance of Electronic Packaging, EPEP'93, Oct. 20-22, 1993, Monterey, Calif., pp.37-39.
FIG. 6
highlights the key parameters used to translate from the table to a fast simulator, which is part of the CAD tool, which relies on pre-calculated RLC matrices stored in large tables. These R(f), L(f), and C matrices are obtained from three-dimensional, 3D, calculations that are very lengthy.
One net topology, such as shown in
FIG. 6
, requires 40-60 hours of CPU time. A typical 7-layer on-chip wiring structure requires 31 such nets to be calculated and the database build up can take as long as two-and-a-half months. Any design or technology ground rule changes require a new set of calculations, thus lengthening the design cycle for bringing the microprocessor chip to market with subsequent significant loss of revenue.
SUMMARY OF THE INVENTION
The invention presents a technique for greatly reducing the time required for generating the large RLC look-up tables needed for the CAD tool that performs crosstalk violation checking on on-chip wiring. The technique relies on two-dimensional,
2
D, or two-plus a fast three-dimensional 2D/3D, calculation of the circuit parameters. This allows a reduction of computation time from 40-60 hours to 20 minutes to 2 hours per net. The loss in accuracy is insignificant while the design productivity and product competitiveness is greatly increased.


REFERENCES:
patent: 5313398 (1994-05-01), Rohrer et al.
patent: 5706477 (1998-01-01), Goto
patent: 6028989 (2000-02-01), Dansky et al.
patent: 6342823 (2002-01-01), Dansky et al.
“Frequency-dependent Crosstalk Modeling for On-chip Interconnections”, by A. Deutsch, et al., Proceedings IEEE 7th Topical Meeting on Electrical Packaging, Oct. 26-28, 1998, West Point, NY, pp. 35-38.
“High-speed propagation on lossy transmission lineso”, by A. Deutsch, et al., IBM Journal Research and Development, vol. 34, No. 4, pp. 601-615, Jul. 1990.
“Pulse, Digital, and Switching Waveforms”, by J. Millman, et al., Chapter 2, pp. 27-50, McGraw-Hill Book

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