Efficient memory allocation scheme for data collection

Details Efficient memory allocation scheme for data collection Efficient memory allocation scheme for data collection

2001-02-16

2004-12-28

Lane, Jack A. (Department: 2186)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S046000, C717S124000, C717S128000

Reexamination Certificate

active

06836861

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to the field of data storage. More particularly, the invention relates to an efficient system and method for storing and transferring data within a data-collecting system, such as statistical information collected from monitored functions in communications transceivers.
BACKGROUND OF THE INVENTION
Orthogonal Frequency Domain Multiplexing (OFDM) transceiver application-specific integrated circuits (ASIC), such as those used in wireless modems, often include a data collection function that monitors various components of the circuit and collects corresponding data for subsequent processing, often by an external processor. Typically, the collected data is statistical data relating to the performance of the respective components.
The ASIC's data collection function gathers information from internal processing units of the ASIC and forwards this information to a host processor for postprocessing. For example, system requirements may require monitoring relevant parameters of internal blocks, such as power, antenna gain, and the like, with the collected data being processed to determine whether fine tuning of the system is needed.
In order to achieve this data collection function, the prior art systems employ large amounts of on-chip memory (e.g., 12K (12,000) bytes) to store the collected statistical information within the ASIC prior to forwarding that data to the host processor for processing. This approach of using large on-chip memory to store collected statistics is undesirable because it increases the cost of the ASIC, and does not exploit unused regions of existing system memory.
Thus, what is needed is a system and method for efficiently collecting and transferring data from an ASIC or other like circuit to external system memory. The present invention addresses one or more of these desirable features.
SUMMARY OF THE INVENTION
Briefly, the present invention is directed to a system and method that provides an integrated circuit which includes a small on-chip buffer to store collected data, thereby shifting the burden of storing the majority of the collected data to external system memory, which is typically comprised of commodity memory chips. Since this external system memory already exists for use by other system functions, utilizing unused regions of this external memory increases overall hardware efficiency, while achieving lower ASIC manufacturing cost.
In one embodiment, the invention is directed to a system for managing data generated by one or more sources, and includes a host processor and memory unit, and a circuit including one or more sources, a controller connected to the one or more sources, and a buffer memory, where the controller is operative to periodically receive data from the one or more sources, transfer the data to the buffer, and at a predetermined point the buffer is controlled to transfer the data to the memory unit.
In another embodiment, the invention is directed to a method for managing data in an integrated circuit, including receiving data from one or more sources within the integrated circuit, storing the data in a buffer memory, transferring the data from the buffer to an external memory location upon reaching a predetermined condition, and then repeating the process.


REFERENCES:
patent: 5560036 (1996-09-01), Yoshida
patent: 5768152 (1998-06-01), Battaline et al.
patent: 0316609 (1989-05-01), None

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