Efficient distributed SAT and SAT-based distributed bounded...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

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10795384

ABSTRACT:
There is provided a method of solving a SAT problem comprising partitioning SAT-formula clauses in the SAT problem into a plurality of partitions. Each of said plurality of partitions is solved as a separate process each, thereby constituting a plurality of processes where each of said process communicates only with a subset of the plurality of processes.

REFERENCES:
patent: 5469367 (1995-11-01), Puri et al.
patent: 6415430 (2002-07-01), Ashar et al.
patent: 6442732 (2002-08-01), Abramovici et al.
patent: 6496961 (2002-12-01), Gupta et al.

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