Coded data generation or conversion – Digital code to digital code converters – To or from number of pulses
Reexamination Certificate
2009-03-30
2010-10-05
Williams, Howard (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from number of pulses
C326S038000, C326S040000, C326S041000
Reexamination Certificate
active
07808405
ABSTRACT:
In one embodiment of the invention, a method of generating a compressed configuration bitstream for a programmable logic device comprises encoding the most-prevalent data word within the configuration data of the bitstream into a codeword of a first type; encoding a set of more-prevalent data words within the configuration data into codewords of a second type; and including in the compressed bitstream at least some of the data words that are members of the set of more-prevalent data words. The included data words, when received by the programmable logic device, are adapted to be identified by the device as members of the set of more-prevalent data words. The included data words are stored for selection by the device when a codeword of the second type representing an included data word is received by the device.
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Koch et al., Hardware Decompression Techniques for FPGA-Based Embedded Systems, ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 2 , Issue 2 (Jun. 2009) Article No. 9, Year of Publication: 2009, ISSN:1936-7406.
Lattice Semiconductor Corporation
Williams Howard
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