Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-02-09
2008-11-25
Garbowski, Leigh Marie (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07458056
ABSTRACT:
Proximity effect correction has become a necessary step in the fabrication of integrated circuit in order to improve the pattern fidelity of current lithography processes. Current methodology is limited by data volume increase and correction inaccuracy due to extrapolation of the correction. The invention describes a methodology based on the interpolation of the correction between selected evaluation points of the target layout. By connecting the correction points this technique also provides a mean of reducing data volume and simplifying the mask writing, inspection and repair processes. The same methodology can be applied to layouts with non-printing assist features, where the correction of the assist features is based on the quality of the image of the main feature. For vector-scan mask write tool the segments interpolating the corrections can be fractured in segments with suitable angles.
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Garbowski Leigh Marie
Milks, III William C.
Russo & Hale LLP
Takumi Technology Corp.
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