EEPROM programming method

Details EEPROM programming method EEPROM programming method

1991-09-12

1993-11-30

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Erase

365185, 36523001, 365900, G11C 1140

Patent

active

052672093

ABSTRACT:
An electrically erasable programmable read-only memory receives a single supply voltage and a ground voltage, and generates a first voltage higher than both the supply voltage and the ground voltage, and a second voltage lower than both the supply voltage and the ground voltage. Each memory cell in the memory has a nonvolatile storage transistor with a floating gate. To erase the memory cell, the first voltage is applied on a first side of the floating gate and second voltage is applied on a second, opposite side of the floating gate. To program the memory cell, the second voltage is applied on the first side of the floating gate, and the first voltage is applied on the second side of the floating gate.

REFERENCES:
patent: 5003510 (1991-03-01), Kamisaki
D'Arrigo et al., 1989 IEEE International Solid-State Circuits Conference, pp. 132-133; Session 10: Non-Volatile Memories; Tham 10.3: A 5V-Only 256k Bit CMOS Flash EEPROM.

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