EEPROM on insulator

Details EEPROM on insulator EEPROM on insulator

1995-03-08

1997-08-12

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, H01L 2701, H01L 2712, H01L 310392, H01L 29788

Patent

active

056568452

ABSTRACT:
A nonvolatile memory cell such as an EPROM or EEPROM formed with a silicon on insulator technology has immunity to latchup and punchthrough and increased transconductance. A floating gate is formed atop a thin active layer of silicon containing source, drain and channel regions, the active layer lying atop an insulative layer that shields the active layer from an underlying silicon substrate. In a preferred embodiment, a stripe-shaped split gate extends over the floating gate and a portion of the channel, the split gate employed both to control charging and discharging of the floating gate and to sense whether charge is stored on the floating gate, while occupying a smaller memory cell area.

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patent: 5365097 (1994-11-01), Kenney
Muller et al, Device Electronics for IC's pp. 452-454, 1986.

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