EEPROM memory cell with improved protection against errors due t

Details EEPROM memory cell with improved protection against errors due t EEPROM memory cell with improved protection against errors due t

1990-07-09

1992-04-21

Bowler, Alyssa H.

Static information storage and retrieval

Systems using particular element

Semiconductive

365185, 36518901, 365200, G11C 700, G11C 1138

Patent

active

051074613

ABSTRACT:
An electrically erasable programmable read only memory (EEPROM) memory cell with 100% redundancy includes two tunnel storage elements (10, 18; 26, 30) which are connected in parallel between a common source voltage (16) and an enabling transistor (22) which is controlled by a transfer terminal (24) and leads to a bit line (14), with respective sensing transistors (12, 28) arranged in series with respect to the storage elements. According to the invention, the cell furthermore includes an auxiliary enabling transistor (40) which is arranged in series with the source and is controlled by the transfer terminal.

REFERENCES:
patent: 3593037 (1971-07-01), Hoff Jr.
patent: 3691537 (1972-09-01), Burgess et al.
patent: 4823316 (1989-04-01), Riva
patent: 4912534 (1990-03-01), Tanaka et al.
patent: 4958317 (1990-09-01), Terada
patent: 4961002 (1990-10-01), Tam et al.

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