EEPROM cell with field-edgeless tunnel window using shallow tren

Details EEPROM cell with field-edgeless tunnel window using shallow tren EEPROM cell with field-edgeless tunnel window using shallow tren

1998-02-20

2000-07-25

Crane, Sara

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257321, H01L 29788

Patent

active

06093946&

ABSTRACT:
An improved EEPROM cell having a field-edgeless tunnel window is provided which is fabricated by a STI process so as to produce reliable endurance and data retention. The EEPROM cell includes a floating gate, a programmable junction region, and a tunneling oxide layer separating the programmable junction region and the floating gate. The tunneling oxide layer defines a tunnel window which allows for programming and erasing of the floating gate by tunneling electrons therethrough. The programmable junction region has a width dimension and a length dimension so as to define a first area. The tunnel window has a width dimension and a length dimension so as to define a second area. The second area of the tunnel window is completely confined within the first area of the programmable junction region so as to form a field-edgeless tunnel window.

REFERENCES:
patent: 5051795 (1991-09-01), Gill et al.
patent: 5293331 (1994-03-01), Hart et al.
patent: 5324972 (1994-06-01), Takebuchi et al.
patent: 5764569 (1998-06-01), Wright

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