EEPROM and method of manufacturing the same

Details EEPROM and method of manufacturing the same EEPROM and method of manufacturing the same

2005-08-17

2008-08-26

Menz, Douglas M (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S314000

Reexamination Certificate

active

07417279

ABSTRACT:
An EEPROM includes a substrate, a first semiconductor layer and a second semiconductor layer formed on the substrate. The first semiconductor layer is isolated from the second semiconductor layer by a trench. A first source and a first drain are located at two opposing sides of the first semiconductor layer. A first dielectric layer is formed on the first semiconductor layer, and a first floating gate is formed on the first dielectric layer. A second source and a second drain are located at two opposing sides of the second semiconductor layer. A second dielectric layer is formed on the second semiconductor layer, and a second floating gate is formed on the second dielectric layer. The first floating gate and the second floating gate are electrically connected.

REFERENCES:
patent: 4233616 (1980-11-01), Kyomasu et al.
patent: 5465231 (1995-11-01), Ohsaki
patent: 5998830 (1999-12-01), Kwon
patent: 6005270 (1999-12-01), Noguchi

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