Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Patent
1996-03-22
1998-11-10
Dinh, Son T.
Static information storage and retrieval
Addressing
Including particular address buffer or latch circuit...
36518912, 365193, 365233, G11C 800
Patent
active
058354425
ABSTRACT:
An EDRAM device includes an EDRAM memory array on a semiconductor chip. A row enable signal generator and a column address latch signal generator are provided on the same semiconductor chip for generating row enable and column address latch signals for application to the EDRAM memory array.
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Heisler Dion Nickolas
Heisler Doyle James
Joseph James Dean
Dinh Son T.
Enhanced Memory Systems Inc.
Kubida, Esq. William J.
Meza, Esq. Peter J.
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