Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate
Reexamination Certificate
2000-02-07
2002-07-09
Christianson, Keith (Department: 2813)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
C438S047000, C438S094000
Reexamination Certificate
active
06417077
ABSTRACT:
FIELD OF THE INVENTION
The present disclosure is in the field of semiconductor fabrication, in particular the field of growth of lattice mismatched crystals in a semiconductor device.
RELATED ART
There is a need in the semiconductor industry for devices in which adjoining layers in a semiconductor device comprise monocrystalline layers in which the lattice structures of the two crystal layers do not match. These are known as lattice mismatched substrates. The difficulty in producing such devices is that the mismatch of the crystalline lattice structure at the interface creates a strain in a growing crystal layer, and this strain leads to dislocation defects that introduce unwanted changes in the electrical and optical properties of the crystal structure. One way of avoiding these dislocation problems has been to limit adjoining semiconductor layers to those which have very closely lattice matched crystal structures. This strategy is limited, however, in that very few lattice matched systems have large enough energy band offsets to be useful for new devices.
There is a particular need in the art, for example, for an efficient method of depositing a direct bandgap material onto a silicon substrate, which is an indirect bandgap material. This would allow the incorporation of further electronic devices such as optical emitters and detectors to be incorporated into silicon VLSI circuitry on a CMOS device. One solution to this problem has been what is termed flip-chip bonding of group III-V material to silicon. This technique involves production of a silicon substrate and a separate gallium arsenide substrate, for example, which are directly bonded face to face with an array of solder balls. This method of producing the device has a low yield due to the difficulty of aligning such devices and ensuring that all the solder balls are making good contact. Another solution has been described in U.S. Pat. No. 5,158,907, which describes semiconductor devices having a low density of dislocation defects that are formed from epitaxial layers grown on defective or misfit substrates. As described in this patent, many misfit dislocations have thread-like vertical components, termed threading segments, which terminate at a surface of the crystal structure. These defects will continue through the crystal layers to a surface, such as a lateral surface, which does not cause a problem, or they may reach to the top of the crystal layer, making it an unsuitable substrate for an optical device. By depositing a layer of gallium arsenide, for example, onto a silicon surface wherein the deposited layer is relatively much thicker than the area of the interface, the threading segments or defaults propagate to the sides of the deposited layer thus creating a monocrystalline surface at the top. There is still a need, however, for a technique of depositing a mismatched lattice layer onto a silicon substrate in which dislocation defects are not formed.
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Christianson Keith
Clingan, Jr. James L.
Motorola Inc.
Smoot Stephen W.
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