Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
1995-05-05
2001-10-09
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S704000, C257S692000
Reexamination Certificate
active
06300673
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to metal packages for housing a plurality of integrated circuit devices. More particularly, the invention relates to an adhesively sealed metal package having a circuit electrically interconnected to a leadframe and thermally connected to the package base.
Adhesively sealed metal packages are disclosed in U.S. Pat. Nos. 4,105,861 to Hascoe; 4,461,924 to Butt and 4,939,316 to Mahulikar et al, all of which are incorporated by reference in their entireties herein. The packages have a metallic base and cover. A leadframe is disposed between the base and cover and adhesively bonded to both. The leadframe may include a centrally positioned die attach paddle with an integrated circuit device bonded thereto. Bond wires electrically interconnect the device to the leadframe.
One advantage of metal packages over molded plastic packages such as quad flat packs (QFPs) or ceramic packages such as ceramic dual in line packages (CERDIPs), is improved thermal conduction. The metal package removes heat generated during the operation of the device more efficiently than plastic or ceramic packages. The improved heat dissipation is due to both the improved thermal conduction of the metallic components and the ability of the components to disperse heat laterally along all surfaces of the package. The improved thermal dissipation permits encapsulation of more complex and higher power integrated circuit devices than is possible with plastic or ceramic packages.
As the integrated circuit devices become more complex, more electrical interconnections with external circuitry and with other integrated circuit devices are required. The leadframe which electrically interconnects the device to external circuitry is usually manufactured from a copper base alloy having a thickness of from about 0.13 mm to about 0.51 mm (5-20 mils). Due to stamping and etching constraints, the minimum width of each lead, as well as the spacing between leads is about equal to the thickness of the leadframe. As a result, there is a limit on the number of leads which may approach the integrated circuit device.
An additional limitation is lead length. As the integrated circuit devices become more powerful and operate at higher operating speeds, the time for an electronic signal to travel from one device to the next limits the speed of the electronic assembly (such as a computer). When a single device is encapsulated in each electronic package, the electronic signal must travel from the device, through a bond wire, through a leadframe, through a circuit trace on a printed circuit board, through a second leadframe, through a second bond wire and then to a second discretely housed device.
One approach to increase the density of interconnections to an integrated circuit device and to reduce the time required for an electric signal to travel from device to device is a hybrid circuit. A hybrid circuit has conductive circuit traces formed on a dielectric substrate. Discrete integrated circuit devices are electrically interconnected to the circuit traces such that a plurality of devices may all be located on a single substrate. The hybrid circuit can then be encapsulated in a metal, plastic or ceramic package typically referred to as a multi-chip module. Examples of multi-chip modules, as well as a description of their development may be found in an article by Hodson entitled “Circuits Meet the Challenge of Size, Power and Flexibility” which appeared in the October, 1991 issue of ELECTRONIC PACKAGING AND PRODUCTION and is incorporated by reference in its entirety herein.
Multi-chip modules address the problem of increasing the density of integrated circuit devices. However, the dielectric substrates. Which are typically silicon or alumina, are not ideal for the conduction of heat from the multi-chip module. While aluminum nitride has been proposed as an alternate and will provide better thermal conduction, the material is brittle and hard to fabricate.
Applicants have determined that a low cost, high thermal conductivity multi-chip module may be formed using a metallic substrate. The metal, preferably copper, aluminum or an alloy thereof, has better thermal conductivity than conventional silicon and alumina substrates and also better thermal conductivity than Kovar which is frequently used to house the circuits.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a multi-chip module having high thermal conductivity. It is a feature of the invention that a circuit, either rigid or flexible, and either single or multi-layer, is adhesively bonded to a metallic substrate with an inorganic dielectric layer disposed therebetween. A plurality of integrated circuit devices are electrically interconnected either to that circuit or to a leadframe positioned around the perimeter of the circuit. Yet another feature of the invention is that the devices may be attached to any one of the metallic substrate, inorganic dielectric layer, the circuit traces or an intervening die attach paddle. It is an advantage of the invention that the multi-chip modules have high thermal dissipation capabilities. Another advantage of the invention is that the inorganic dielectric layer electrically isolates the integrated circuit devices, the adhesively bonded circuit and the leadframe from the metallic package components of the multi-chip module.
In accordance with the invention, there is provided a leadframe assembly for electrically interconnecting a plurality of semiconductor devices. The assembly includes a leadframe with inner lead ends defining a central region and a hybrid circuit. The hybrid circuit is made up of a dielectric substrate which supports circuit traces. The hybrid circuit contains a first means for electrically interconnecting at least a portion of the circuit traces to the inner lead ends of the leadframe and a second means for supporting a plurality of discrete semiconductor devices.
In a second embodiment of the invention, the leadframe assembly is encapsulated within metallic package components or is encased in a plastic molding resin.
The above stated objects, features and advantages, as well as others, will become more apparent from the specification and drawings which follow.
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“Multilayer Printed Circuits from Revolutionary Transient Liquid Phase Inks” by Capote et al. Technical Note #4. Toranaga Technologies, Inc. (1993).
“Using Ormet 2000” Technical Note #3. Rev. 2. Toranaga Technologies, Inc. (1933).
Braden Jeffrey S.
Hoffman Paul R.
Popplewell James M.
Advanced Interconnect Technologies, Inc.
Clark Sheila V.
Rosenblatt Gregory S.
Wiggin & Dana
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