Cleaning and liquid contact with solids – Processes – Work handled in bulk or groups
Reexamination Certificate
1999-07-09
2003-02-11
Stinson, Frankie L. (Department: 1746)
Cleaning and liquid contact with solids
Processes
Work handled in bulk or groups
C134S033000, C134S147000, C134S153000, C134S902000
Reexamination Certificate
active
06516815
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electro-chemical deposition or electroplating apparatus. More particularly, the invention relates to an apparatus for removing deposition from a peripheral portion of a substrate.
2. Background of the Related Art
Sub-quarter micron, multi-level metallization is one of the key technologies for the next generation of ultra large scale integration (ULSI). The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
As circuit densities increase, the widths of vias, contacts and other features, as well as the dielectric materials between them, decrease to less than 250 nanometers, whereas the thickness of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increases. Many traditional deposition processes, such as physical vapor deposition (PVD) and chemical vapor deposition (CVD), have difficulty filling structures where the aspect ratio exceed 4:1, and particularly where it exceeds 10:1.Therefore, there is a great amount of ongoing effort being directed at the formation of void-free, nanometer-sized features having high aspect ratios wherein the ratio of feature height to feature width can be 4:1 or higher. Additionally, as the feature widths decrease, the device current remains constant or increases, which results in an increased current density in the feature.
Elemental aluminum (Al) and its alloys have been the traditional metals used to form lines and plugs in semiconductor processing because of aluminum's perceived low electrical resistivity, its superior adhesion to silicon dioxide (SiO
2
), its ease of patterning, and the ability to obtain it in a highly pure form. However, aluminum has a higher electrical resistivity than other more conductive metals such as copper, and aluminum also can suffer from electromigration leading to the formation of voids in the conductor.
Copper and its alloys have lower resistivities than aluminum and significantly higher electromigration resistance as compared to aluminum. These characteristics are important for supporting the higher current densities experienced at high levels of integration and increase device speed. Copper also has good thermal conductivity and is available in a highly pure state. Therefore, copper is becoming a choice metal for filling sub-quarter micron, high aspect ratio interconnect features on semiconductor substrates.
Despite the desirability of using copper for semiconductor device fabrication, choices of fabrication methods for depositing copper into very high aspect ratio features, such as a 4:1, having 0.35 &mgr; (or less) wide vias are limited. As a result of these process limitations, plating, which had previously been limited to the fabrication of lines on circuit boards, is just now being used to fill vias and contacts on semiconductor devices.
Metal electroplating is generally known and can be achieved by a variety of techniques. A typical method generally comprises physical vapor depositing a barrier layer over the feature surfaces, physical vapor depositing a conductive metal seed layer, preferably copper, over the barrier layer, and then electroplating a conductive metal over the seed layer to fill the structure/feature. Finally, the deposited layers and the dielectric layers are planarized, such as by chemical mechanical polishing (CMP), to define a conductive interconnect feature.
FIG. 1
is a cross sectional view of a simplified typical fountain plater
10
incorporating contact pins. Generally, the fountain plater
10
includes an electrolyte container
12
having a top opening, a substrate holder
14
disposed above the electrolyte container
12
, an anode
16
disposed at a bottom portion of the electrolyte container
12
and a contact ring
20
contacting the substrate
22
. A plurality of grooves
24
are formed in the lower surface of the substrate holder
14
. A vacuum pump (not shown) is coupled to the substrate holder
14
and communicates with the grooves
24
to create a vacuum condition capable of securing the substrate
22
to the substrate holder
14
during processing. The contact ring
20
comprises a plurality of metallic or semimetallic contact pins
26
distributed about the peripheral portion of the substrate
22
to define a central substrate plating surface. The plurality of contact pins
26
extend radially inwardly over a narrow perimeter portion of the substrate
22
and contact a conductive seed layer of the substrate
22
at the tips of the contact pins
26
. A power supply (not shown) is attached to the pins
26
thereby providing an electrical bias to the substrate
22
. The substrate
22
is positioned above the cylindrical electrolyte container
12
and electrolyte flow impinges perpendicularly on the substrate plating surface during operation of the cell
10
.
One particular problem encountered in current electroplating processes is that the edge of the seed layer receives an excess amount of deposition, typically referred to as an edge bead, during the electroplating process.
FIG. 2
is a cross sectional view of an edge of an wafer
30
showing excess deposition
36
at the edge
32
of the seed layer
34
. As shown in
FIG. 2
, the wafer
30
has a seed layer
32
deposited thereon and an electroplated layer
38
electrochemically deposited over the seed layer
34
. It has been observed that the edge
32
of the seed layer
34
receives a higher current density than the remainder of the seed layer
34
, resulting in a higher rate of deposition at the edge
32
of the seed layer
34
. The mechanical stress at the edge
32
of the seed layer
34
is also higher than the remainder of the seed layer, causing the deposition at the edge of the seed layer to pull up and away from the edge of the wafer
30
. The excess deposition
36
is typically removed by a CMP process. However, during the CMP process, the excess deposition
36
at the edge of the wafer typically tears off from the edge of the seed layer and may damage the adjacent portion of the wafer. The broken off metal may also damage the devices formed on the wafer. Thus, the number of properly formed devices is decreased and the cost per device formed is increased.
Therefore, there is a need for an apparatus for removing the excess deposition at the edge of the wafer. Preferably, the apparatus removes the excess deposition at the edge of the wafer without damaging the devices formed on the wafer surface. It would be further desirable for the apparatus to be adaptable for performing a wafer cleaning process after the excess deposition has been removed from the wafer, such as a spin-rinse-dry process.
SUMMARY OF THE INVENTION
The invention generally provides an apparatus and a method for removing deposition at the edge of a wafer. The apparatus according to the invention removes deposition at the edge of a wafer without damaging the devices formed on the wafer surface.
One aspect of the invention provides an apparatus for etching a substrate, comprising: a container; a substrate support disposed in the container; a rotation actuator attached to the substrate support; and a fluid delivery assembly disposed in the container to deliver an etchant to a peripheral portion of a substrate disposed on the substrate support. Preferably, the substrate support comprises a vacuum chuck and the fluid delivery assembly comprises one or more nozzles.
Another aspect of the invention provide a method for etching a substrate, comprising: rotating a substrate positioned on a rotatable substrate support; and delivering an etchant to a peripheral portion of the substrate. Preferably, the substrate is rotated at betw
Ko Alex
Mok Yeuk-Fai Edwin
Olgado Donald
Stevens Joe
Applied Materials Inc.
Moser Patterson & Sheridan
Stinson Frankie L.
LandOfFree
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