Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-06-05
2007-06-05
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C703S002000
Reexamination Certificate
active
11139390
ABSTRACT:
One embodiment of the present invention provides a system that calculates an edge-based proximity correction which is applied to a region in the proximity of an evaluation point. During operation the system receives a layout. Next, the system decomposes polygons in the layout into edges. The system then computes the edge-based proximity correction based on the contributions of the edges. Specifically, the system computes contributions of the edges by: representing an edge as a difference between a first line-segment and a second line-segment which overlap at all points except for the points on the edge; determining a first pre-computed value that represents the first line-segment's contribution to the edge-based proximity correction; determining a second pre-computed value that represents the second line-segment's contribution to the edge-based proximity correction; and determining the contribution of the edge based on the difference between the first pre-computed value and the second pre-computed value.
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Chiang Jack
Doan Nghia M.
Park Vaughan & Fleming LLP
Synopsys Inc.
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