Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1994-01-19
1995-09-12
Hudspeth, David R.
Electronic digital logic circuitry
Interface
Logic level shifting
326 77, 326 14, 326 16, 326 94, 327333, H03K 190175, H03K 19007
Patent
active
054500249
ABSTRACT:
An ECL to CMOS signal converter circuit including built-in toggle-fault detection circuitry and method of conversion are provided in which an RF transformer is used to translate ECL level digital signals to CMOS level signals. A diode biasing circuit shifts the average DC level of the CMOS level signals in a positive direction to avoid signal undershoot. An AC peak detection circuit is connected to the inactive leg of the RF transformer to monitor toggling of the ECL level input signal lines. A DC comparator circuit compares the detected peak voltage with a predetermined threshold voltage, and generates an alarm signal representing a toggle-fault whenever the detected peak voltage is lower than the predetermined threshold.
REFERENCES:
patent: 4891535 (1990-01-01), Etheridge
patent: 4931667 (1990-06-01), Pfennings et al.
patent: 5136189 (1992-08-01), Demaris
patent: 5216674 (1993-06-01), Peter et al.
patent: 5264745 (1993-11-01), Woo
patent: 5304856 (1994-04-01), Rainal
Alcatel Network Systems, Inc.
Hudspeth David R.
Roseen Richard
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