Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1997-12-16
1999-08-03
Santamauro, Jon
Electronic digital logic circuitry
Interface
Logic level shifting
326 68, H03K 190185
Patent
active
059330244
ABSTRACT:
A voltage level translator for converting a small-signal differential ECL input signal into a full rail, single-ended CMOS output signal, wherein the difference in current generated by a pair of P-channel transistors as a result in a transitioning of the ECL signal is "mirrored" by a pair of N-channel output transistors, causing the CMOS output voltage to transition, the delay in transitioning of the output transistors being minimized through the use of delayed feedback.
REFERENCES:
patent: 4868427 (1989-09-01), Fitzpatrick et al.
patent: 5136190 (1992-08-01), Chern et al.
patent: 5182475 (1993-01-01), Lien
patent: 5384737 (1995-01-01), Childs et al.
patent: 5729156 (1998-03-01), Lim
Micro)n Technology, Inc.
Santamauro Jon
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