ECL-to-CMOS level conversion for use in ECL-BiCMOS circuit

Details ECL-to-CMOS level conversion for use in ECL-BiCMOS circuit ECL-to-CMOS level conversion for use in ECL-BiCMOS circuit

1987-12-18

1988-12-27

Wong, Peter S.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

323317, 307446, 307475, G05F 320

Patent

active

047943173

ABSTRACT:
A high-speed level shifter converts ECL logic levels to CMOS logic levels for use in an ECL BiCMOS circuit. A CMOS inverter (34) is connected to the output of an emitter coupled pair through a resistor (36). A current reference circuit ensures that the voltage drop across the resistor (36) is such to shift the ECL logic level to the trip point of the CMOS buffer.

REFERENCES:
patent: 4437171 (1984-03-01), Hudson et al.
patent: 4453095 (1984-06-01), Wrathall
patent: 4563601 (1986-01-01), Asano et al.
patent: 4645951 (1987-02-01), Uragami
patent: 4645954 (1987-02-01), Schuster
patent: 4692641 (1987-09-01), Highton
patent: 4697109 (1987-09-01), Honma et al.

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