ECL-to-BICOMS/CMOS translator

Details ECL-to-BICOMS/CMOS translator ECL-to-BICOMS/CMOS translator

1994-05-09

1995-07-18

Hudspeth, David R.

Electronic digital logic circuitry

Interface

Logic level shifting

326 84, 326 17, H03K 190175, H03K 1908

Patent

active

054345189

ABSTRACT:
An ECL-to-BiCMOS/CMOS translator for translating a pair of differential ECL level signals into a BiCMOS/CMOS level signal is disclosed. The translator includes an output stage having an output node and a first output switching means for coupling the output node to a first voltage supply and a second output switching means for coupling the output node to a second voltage supply. A first input stage activates the first output switching means of the output stage in response to one of the differential ECL signals, and a second input stage activates the second output switching means of the output stage in response to the other differential ECL signal. The first input stage includes a first input switching means for coupling a first resistive element between the first voltage supply and the output node of the output stage, and the second input stage includes a second input switching means for coupling a second resistive element between the first voltage supply and the second voltage supply.

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U.S. patent application, Ser. No. 586,068, Filed Sep. 21, 1990, Inventor Robert Bosnyak, Assignee National Semiconductor Corporation, now U.S. Pat. No. 5,068,551.

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