ECL gate having active pull-down transistor

Details ECL gate having active pull-down transistor ECL gate having active pull-down transistor

1993-05-03

1995-01-10

Hudspeth, David R.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Bipolar transistor

326 21, 327540, 327513, H03K 19003, H03K 19013

Patent

active

053810570

ABSTRACT:
The present invention relates to a modified emitter coupled logic circuit which includes a differential logic stage and an emitter-follower output stage. An active pull-down circuit and a constant voltage source are included in the output stage of this circuit to allow the output of the circuit to switch from a high level to a low level at approximately the same speed as the output can switch from a low level to a high level. A particular embodiment of the present invention provides a constant voltage source comprising an operational amplifier, a reference potential generating circuit and a constant voltage signal adjusting circuit.

REFERENCES:
patent: 4874970 (1989-10-01), Coy et al.
patent: 4906869 (1990-03-01), Masuoka
patent: 4948991 (1990-08-01), Schucker et al.
patent: 5012128 (1991-04-01), Chan
patent: 5072136 (1991-12-01), Naghshineh
patent: 5073728 (1991-12-01), Ovens
patent: 5101124 (1992-03-01), Estrada
patent: 5216296 (1993-06-01), Tsunoi et al.
patent: 5237216 (1993-08-01), Hayano et al.
patent: 5293083 (1994-03-01), Askin et al.

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