ECL-CMOS level conversion circuit

Details ECL-CMOS level conversion circuit ECL-CMOS level conversion circuit

1995-12-12

1996-12-17

Westin, Edward P.

Electronic digital logic circuitry

Interface

Logic level shifting

326 68, H03K 19094, H03K 190175

Patent

active

055857434

ABSTRACT:
In a level conversion circuit for converting a pair of first-level signals into a pair of second-level signals, an input buffer circuit converts the pair of first-level signals into a pair of buffered signals which vary within a first voltage range situated below a second voltage range within which the pair of first-level signals vary. An amplifier circuit, which includes a plurality of CMOS differential amplifier circuits cascaded, converts the pair of buffered signals into the pair of second-level signals varying within a third voltage range broader than the second voltage range of the pair of first-level signals.

REFERENCES:
patent: 4437171 (1984-03-01), Hudson et al.
patent: 4453095 (1984-06-01), Wrathall
patent: 4563601 (1986-01-01), Asano et al.
patent: 5075578 (1991-12-01), Wendell
patent: 5153465 (1992-10-01), Sandhu
patent: 5216298 (1993-06-01), Ohba et al.
patent: 5293081 (1994-03-01), Chiao et al.
patent: 5329183 (1994-07-01), Tamegaya

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