Echo cancellation circuit using stored, derived error map

Details Echo cancellation circuit using stored, derived error map Echo cancellation circuit using stored, derived error map

1982-06-14

1985-07-09

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

375 13, 375 20, 375101, 328165, 332 37D, 333 18, H04B 308

Patent

active

045286760

ABSTRACT:
An automatic correction circuit is responsive to suitable bit patterns in a bit stream being received from a transmission medium, to generate an error amplitude map of signal distortion being introduced by the transmission medium. The error amplitude map is digitally stored or recorded. After each non zero bit occurrence in the signal stream a synchronized output signal corresponding to the recorded error amplitude map is generated and added to the bit stream being received to reduce signal distortion, whereby information recovery from the received bit stream is improved.

REFERENCES:
patent: 3426281 (1969-02-01), Klein
patent: 4170758 (1979-10-01), Tamburelli
patent: 4288872 (1981-08-01), Tamburelli
Angelo Luvison et al., "Theory and Implementation of Adaptive Equalizers", CH1435-7/79/0000-0251, IEEE, pp. 45.6.1-45.6.6.
Nobuo Inoue et al., "Time-Shared Two-Wire Digital Subscriber Transmission System and its Application to the Digital Telephone Set", IEEE Transactions on Communications, vol. Com. 29, No. 11, Nov. 1981, pp. 1565-1572.

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