Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
1999-05-04
2002-06-11
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C714S755000, C714S701000
Reexamination Certificate
active
06405343
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to indexing of parity checkbytes and the associated message bytes for digital message error control operations.
BACKGROUND OF THE INVENTION
One method of error control for digital signals uses P-parity and Q-parity checkbytes to provide a means of identifying the presence of, and location of one or more errors in a digital message. The error correction code (ECC) used in this approach is a product code over the Galois field GF(
2
8
), where each byte is a symbol and a word consists of two bytes (MSB and LSB, or “upper” and “lower”). Consecutive words in a block are numbered n=0, 1, . . . , 1169, and the numbering begins immediately following the end of the sync pattern or other preamble. The entire block, excluding the sync pattern, is protected against (some) errors by the ECC. Column code words and row code words are referred to as P(parity)-words and Q(parity)-words, respectively.
In a conventional approach, the elements s
i,j
for a P-parity matrix and/or the Q-parity matrix are written to and read from a lookup table one at a time. These operations are repetitive but are treated as if they are individually defined. What is needed is an approach that takes advantage of the repetitive nature of the operations to obtain a sequence of read or write operations that can be performed in less time and with less logic hardware. Preferably, the approach should be flexible enough to permit its application to any size parity matrices and with any reasonable primitive polynomial equation that may be chosen.
SUMMARY OF THE INVENTION
These needs are met by the invention, which sets up an sequence of identical read (or write) operations in which the argument or index increases or decreases in a definable manner. An approach is implemented that writes to, or reads from, an entire Q-parity data sequence (1170 entries) in an ordered manner. A Q-parity data sequence includes all the data entries in a P-parity sequence but uses a diagonal format so that the entries appear in a non-intuitive and mixed-up order. The approach accounts for this and for the looping back of the data elements representing the Q-parity sequence. The entries can be written in a burst mode format that reduces the time required to process all the entries.
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patent: 5408477 (1995-04-01), Okada et al.
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patent: 6041431 (2000-03-01), Goldstein
Chung Phung M.
Oak Technology, Inc.
Schipper John
Torres Joseph
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