ECC for single 4-bits symbol correction of 32 symbols words...

Details ECC for single 4-bits symbol correction of 32 symbols words... ECC for single 4-bits symbol correction of 32 symbols words...

2011-08-09

2011-08-09

Baderman, Scott T (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

07996745

ABSTRACT:
An error correction device is provided. Such error correction device may make use of an error correction code defined by a parity matrix specialized for the application to multilevel memories. For example, the parity matrix is characterized by having a Maximum Row Weight equal to 21.

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D. Rossi, et al., “Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories”, Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2002).
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