Static information storage and retrieval – Read/write circuit – Simultaneous operations
Reexamination Certificate
2008-03-26
2010-12-07
Dinh, Son (Department: 2824)
Static information storage and retrieval
Read/write circuit
Simultaneous operations
C365S230030, C365S233100
Reexamination Certificate
active
07848156
ABSTRACT:
A memory device, system and method for allowing an early read operation after one or more write operations is provided according to an embodiment of the present invention. The memory device comprises an interface for providing a first write address, a first write data, and a read address. A memory core is coupled to the interface and includes a first memory section having a first data path and a first address path and a second memory section having a second data path and a second address path. In an embodiment of the present invention, the first data and first address path is independent of the second data and second address path. The first write data is provided on the first data path responsive to the first write address being provided on the first address path while a read data is provided on the second data path responsive to the read address being provided on the second address path.
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Perego Richard E
Ware Frederick A
Dinh Son
Rambus Inc.
Vierra Magen Marcus & DeNiro LLP
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