Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2006-07-18
2006-07-18
Brewster, William M. (Department: 2823)
Semiconductor device manufacturing: process
With measuring or testing
C438S153000, C438S637000, C438S672000
Reexamination Certificate
active
07078247
ABSTRACT:
The integrity of a liner in an interconnect structure or other layer in an integrate circuit is tested in a short time by exposing the liner to a reactive gas that attacks the underlying silicon or other material behind the liner. A weak spot in the liner permits the gas to react with the silicon, which produces a visible area that can be readily identified. The test can be performed in a few hours, in contrast to a period of several months required to complete the process, package the circuit and conduct a burn-in test.
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Bauer, Jr. Lawrence
Giewont Kenneth
Iyer Subramanian
Kim Bosang
Lloyd Jeffrey
Blecker Ira D.
Brewster William M.
International Business Machines - Corporation
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