Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
Reexamination Certificate
2006-09-12
2006-09-12
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Input/output data processing
Data transfer specifying
C710S110000, C710S113000
Reexamination Certificate
active
07107365
ABSTRACT:
A system on a chip (SOC) bus architecture may comprise a plurality of masters operable to request communications over a AMBA-type bus. An arbiter may receive requests and burst control signals directly from the masters. The arbiter may determine a burst length associated with a request and may also grant a master allowance to access the bus. The arbiter may configure a multiplexer to couple the granted master to the bus dependent on the determined burst length.
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AMBA AHB Specification Revision 2.0.
Auve Glenn A.
Cypress Semiconductor Corp.
Marger & Johnson & McCollom, P.C.
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