Dynamically variable digital delay line

Details Dynamically variable digital delay line Dynamically variable digital delay line

1996-11-26

1998-10-06

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Signals

365239, G11C 700

Patent

active

058187693

ABSTRACT:
A dynamically variable digital delay line includes a storage element, write control circuitry, read control circuitry and output rate control circuitry. Generally, the invention applies a predetermined throughput delay to a series of digital data elements by entering each digital data element into a storage element for an amount of time equal to the desired throughput delay, then extracting each digital data element and returning it to the original data path. While operating with a constant predetermined delay, the invention extracts digital data elements from the storage element at the same rate as digital data elements are entered into the storage element. When a change to the throughput delay is required, the invention changes the digital data element extraction rate with respect to the digital data element entry rate until the desired throughput delay is achieved. During the transition period from one throughput delay to another, the only effect to the series of digital data elements at the output of the invention is a variation of the digital data element period. The invention limits variation of the digital data element period to comply with system specifications, so the throughput delay change is accomplished without affecting the integrity of the series of digital data elements.

REFERENCES:
patent: 3838221 (1974-09-01), Schmidt et al.
patent: 5060240 (1991-10-01), Erickson et al.
patent: 5452333 (1995-09-01), Guo et al.
patent: 5486930 (1996-01-01), Iketami et al.

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