Dynamically unbalanced sense amplifier

Details Dynamically unbalanced sense amplifier Dynamically unbalanced sense amplifier

2006-06-06

2006-06-06

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S063000, C365S202000

Reexamination Certificate

active

07057955

ABSTRACT:
A sense amplifier connected to first and second bit lines, comprising means for precharging said bit lines to a high voltage, means for connecting one or the other of the bit lines to a memory cell, said connection causing according to the state of the memory cell a maintaining of the bit line at the high voltage or a voltage reduction, first and second transistors respectively controlled by the first and second bit lines, and, in series with the first and second transistors, a controllable means for the current through the transistor controlled by the bit line connected to the memory cell to be greater than the current through the other transistor when the voltages of the two bit lines are at the high voltage.

REFERENCES:
patent: 4630240 (1986-12-01), Poteet et al.
patent: 5280205 (1994-01-01), Green et al.
patent: 5544110 (1996-08-01), Yuh
patent: 6424181 (2002-07-01), Pogrebnoy
patent: 6914836 (2005-07-01), Jeon et al.
patent: 2002/0180589 (2002-12-01), Gabara
Esp@cenet database, Patent Abstract of JP 10-055672, Feb. 24, 1998.

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