Dynamically scalable cache architecture

Details Dynamically scalable cache architecture Dynamically scalable cache architecture

2006-10-27

2009-10-20

Lane, Jack A (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S154000

Reexamination Certificate

active

07606976

ABSTRACT:
A technique for managing power consumption of a cache memory system dynamically adjusts the size of the cache memory system according to an energy level of an energy storage device. In at least one embodiment of the invention, an apparatus includes a dynamically scalable cache memory circuit including at least one cache memory circuit having an effective cache size selectable from a plurality of cache sizes. The apparatus includes a control circuit responsive to an energy level indicator of at least an approximate energy level of an energy storage device configured to provide energy to the dynamically scalable cache memory circuit. The control circuit is configured to select the effective cache size based at least in part on the energy level indicator.

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