Dynamically adjusting sample density in a graphics system

Computer graphics processing and selective visual display system – Computer graphics display memory system – Memory allocation

Reexamination Certificate

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Details

C345S545000, C345S531000, C345S503000, C345S611000, C345S613000

Reexamination Certificate

active

06999087

ABSTRACT:
A graphics system may include a frame buffer and a hardware accelerator. The frame buffer may include a sample buffer and a double-buffered display area. The hardware accelerator may be coupled to the frame buffer, and configured (a) to receive primitives, (b) to generate samples for the primitives based on a dynamically adjustable sample density value, (c) to write the samples into the sample buffer, (d) to read the samples from the sample buffer, (e) to filter the samples to generate pixels, (f) to store the pixels in a back buffer of the double-buffered display area. A host computer may be configured (e.g., by means of stored program instructions) to dynamically update programmable registers of the graphics system to reallocate the sample buffer in the frame buffer in response to user input specifying a change in one or more window size parameters.

REFERENCES:
patent: 5757375 (1998-05-01), Kawase
patent: 6313838 (2001-11-01), Deering
patent: 6661424 (2003-12-01), Alcorn et al.
patent: 6697063 (2004-02-01), Zhu
patent: 2001/0048435 (2001-12-01), Deering et al.
patent: 2002/0005862 (2002-01-01), Deering
patent: WO 99/41706 (1999-08-01), None
patent: WO 00/00934 (2000-01-01), None
patent: WO 00/49577 (2000-08-01), None

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