Dynamic write cache size adjustment in raid controller with...

Details Dynamic write cache size adjustment in raid controller with... Dynamic write cache size adjustment in raid controller with...

2006-06-02

2008-11-11

Maskulinski, Michael C (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

Reexamination Certificate

active

07451348

ABSTRACT:
A high data availability write-caching storage controller has a volatile memory with a write cache for caching write cache data, a non-volatile memory, a capacitor pack for supplying power for backing up the write cache to the non-volatile memory in response to a loss of main power, and a CPU that determines whether reducing an operating voltage of the capacitor pack to a new value would cause the capacitor pack to be storing less energy than required for backing up the current size write cache to the non-volatile memory. If so, the CPU reduces the size of the write cache prior to reducing the operating voltage. The CPU estimates the capacity of the capacitor pack to store the required energy based on a history of operational temperature and voltage readings of the capacitor pack, such as on an accumulated normalized running time and warranted lifetime of the capacitor pack.

REFERENCES:
patent: 4874960 (1989-10-01), Cybela
patent: 5414861 (1995-05-01), Horning
patent: 5448719 (1995-09-01), Schultz et al.
patent: 5596708 (1997-01-01), Weber
patent: 5625237 (1997-04-01), Saeki et al.
patent: 5758054 (1998-05-01), Katz et al.
patent: 6304981 (2001-10-01), Spears et al.
patent: 6829724 (2004-12-01), Farabaugh et al.
patent: 6838923 (2005-01-01), Pearson
patent: 6847192 (2005-01-01), Turner et al.
patent: 6880967 (2005-04-01), Isozumi et al.
patent: 7051223 (2006-05-01), Batchelor et al.
patent: 2002/0161970 (2002-10-01), Busser
patent: 2003/0046503 (2003-03-01), Park
patent: 2004/0054851 (2004-03-01), Acton et al.
patent: 2005/0132178 (2005-06-01), Balasubramanian
patent: 2005/0235098 (2005-10-01), Tamura et al.
patent: 2005/0283648 (2005-12-01), Ashmore
patent: 2006/0015683 (2006-01-01), Ashmore et al.
patent: 2006/0069870 (2006-03-01), Nicholson et al.
patent: 2006/0080515 (2006-04-01), Spiers et al.
patent: 2006/0106990 (2006-05-01), Benhase et al.
patent: 2007/0106918 (2007-05-01), Oyanagi
patent: 1338874 (2003-08-01), None
patent: 1603026 (2005-12-01), None
patent: 2362768 (2001-11-01), None
patent: 2004037258 (2004-02-01), None
Aerogel, http://en.wikipedia.org/wiki/Aerogel.
ATA-ATAPI, http://ata-atapi.com.
Hearst Electronic Products, Chosing flash memory; http://www.electronicproducts.com/print.asp?ArticleURL=toshiba.apr2004.html, Apr. 2004.
New Computers Based on Non-Volatile Random Access Memory. Http://www.techneon.com/paper
vram.html, Jul. 2003.
Secure Digital SD PCMCIA Adapter, http://www.mittoni.com.au/secure-digital-sd-pcmcia-adapter-p-1182.html, Jun. 2002.

Affiliated with

Also associated with

Rating

Dynamic write cache size adjustment in raid controller with... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dynamic write cache size adjustment in raid controller with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic write cache size adjustment in raid controller with... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4034660