Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1991-06-06
1995-04-25
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Differential sensing
365149, G11C 1134
Patent
active
054105099
ABSTRACT:
A dynamic type semiconductor memory device comprises a semiconductor substrate including a memory cell array, the memory cell array including two kinds of main memory cells and two kinds of dummy cells, a plurality of bit lines disposed above the semiconductor substrate and generally extending in a first direction, a plurality of word lines disposed above the semiconductor substrate and generally extending in a second direction so as to intersect the bit lines, and dummy word lines disposed above the semiconductor substrate and generally extending in the second direction so as to intersect the bit lines. In this case the main memory cells and the dummy cells are connected to the bit lines, the word lines and the dummy word lines, respectively, in such a manner that one of the main memory cells and one of the dummy cells each having the same kind are selected when any one of the main memory cells is selected. As one kind of the main memory cells, trench capacitor type memory cells are used, while stacked capacitor type memory cells are employed as the other kind of the main memory cells.
REFERENCES:
patent: 4117545 (1978-09-01), Inadachi
patent: 4380803 (1983-04-01), Tuan
patent: 4799196 (1989-01-01), Takemae
Kabushiki Kaisha Toshiba
Popek Joseph A.
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