Dynamic type semiconductor memory device having reduced peak cur

Details Dynamic type semiconductor memory device having reduced peak cur Dynamic type semiconductor memory device having reduced peak cur

1992-06-03

1994-11-22

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Data refresh

365205, 365206, 365208, G11C 700

Patent

active

053674936

ABSTRACT:
A dynamic type semiconductor memory device includes a pair of transistors provided in a signal line for transmitting a sense amplifier drive signal to sense amplifiers. The transistors of the pair are provided in parallel with each other, and are activated to couple the sense amplifiers to a source of generating the sense amplifier drive signal. One of the pair of transistors is made nonconductive in a refresh mode of operation. This arrangement reduces the peak value of a current for charging and/or discharging bit lines by the sense amplifiers in the refresh mode of operation, and reduces a noise on a power source line or a ground line at an on-board level, resulting in stable operation of a system.

REFERENCES:
patent: 4207618 (1980-06-01), White, Jr. et al.
patent: 4627033 (1986-02-01), Hyslop et al.
patent: 4943960 (1990-07-01), Komatsu et al.
patent: 5127739 (1992-07-01), Duvvury et al.

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