Dynamic type semiconductor memory device and its manufacturing m

Details Dynamic type semiconductor memory device and its manufacturing m Dynamic type semiconductor memory device and its manufacturing m

1991-11-25

1993-10-05

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257304, 257305, H01L 2968, H01L 2978, H01L 2992

Patent

active

052508307

ABSTRACT:
A groove, which runs vertically and horizontally, is formed in a substrate, thereby a plurality of silicon pillars are formed in a matrix manner. A field oxidation film is formed on the central portion of the groove. A drain diffusion layer is formed on the upper portion of each silicon pillar, and a source diffusion layer is formed on the bottom portion of the groove. A gate electrode, serving as a word line, a storage node contacting the source diffusion layer, and a cell plate are sequentially buried to enclose the surroundings of each silicon pillar, and a bit line is formed in an uppermost layer, thereby a DRAM cell array is structured.

REFERENCES:
patent: 4845539 (1989-07-01), Inoue
IBM Technical Disclosure Bulletin, vol. 32, No. 10B, Mar. 1990, pp. 179-181, "High Density Tantalum Oxide Capacitor Dram Cell Structure and Process Outline for 64 Mb Dram Chips and Beyond".

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