Dynamic type semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365203, 365207, 365208, G11C 702

Patent

active

058897186

ABSTRACT:
A dynamic type semiconductor memory device includes a sense amplifier connected between complementary bit lines on which memory cells are connected, dummy cells each connected on at least one bit line and having a charge accumulation node or a node, at which charge is accumulated, to be linked to the bit line when selected, and a circuit for controlling the potential at a charge accumulation node in a dummy cell during a precharge period during which the complementary bit lines are precharged, so that the potential at the bit line will be set to a given potential. The given potential is set to a potential lower than an intermediate potential of the potential at a high-potential power supply and the potential at a low-potential power supply attained when a potential difference between the complementary bit lines is amplified by the sense amplifier. Owing to this configuration, an increase in area and an increase in power consumption can be suppressed. The potential at a bit line can be changed by a necessary and sufficient magnitude by merely giving relatively simple control. A margin to be maintained for reading data represented by a high-level signal can be expanded.

REFERENCES:
patent: 4421996 (1983-12-01), Chuang et al.
patent: 4751681 (1988-06-01), Hashimoto
patent: 5424977 (1995-06-01), Rountree

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