Dynamic switching of multithreaded processor between single...

Electrical computers and digital processing systems: virtual mac – Task management or control

Reexamination Certificate

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Details

C718S104000, C718S105000, C700S001000, C700S027000, C700S032000, C714S100000, C713S300000

Reexamination Certificate

active

07496915

ABSTRACT:
A method utilizes a multithreaded processor having at least one hardware thread among a plurality of hardware threads that is capable of being selectively activated and deactivated responsive to a control circuit. The control circuit additionally provides the capability of controlling how an inactive thread can be activated after the thread has been deactivated, e.g., by enabling or disabling reactivation in response to an interrupt.

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Borkenhagen et al., “A Multithreaded PowerPC Processor For Commercial Servers,” IBM J. Res. Develop., vol. 44, No. 6, Nov. 2000, pp. 885-898.

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